Dr. Ryan Pavlick joined Intel’s Technology Development organization as process engineer focusing on wet etch process development and improved filtration of targeted chemicals. He continued this work joining Intel’s Global Supply Chain focusing on quality improvement in filtration and purification. Currently, he has taken a forward-looking role evaluating emerging filtration and purification technologies for adoption into Intel’s next generation processes. Dr. Pavlick received his PhD in Chemistry from Pennsylvania State University and his BS in chemistry from The College of New Jersey.
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Facilities are the lifeblood of the semiconductor fab. Underpinning critical roles in yield enhancement,
environmental sustainability, and industry growth, they are undergoing transformative change.
Yet despite this key role, there has never been a collaborative forum dedicated to the extremely complex and technically challenging nature of facilities – until now.